From: Jan Beulich Date: Wed, 14 Aug 2013 09:19:45 +0000 (+0200) Subject: x86: use "R" constraint for fxsaveq/fxrstorq enforcement X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~6533 X-Git-Url: https://dgit.raspbian.org/%22http://www.example.com/cgi/success//%22http:/www.example.com/cgi/success/?a=commitdiff_plain;h=78742c233c664cac6cac8405c154f82239ab6995;p=xen.git x86: use "R" constraint for fxsaveq/fxrstorq enforcement I became aware of this constraint's (referring to all legacy registers in one go) existence by (accidentally) noticing Linux commit 82024135 ("x86-64, fpu: Simplify constraints for fxsave/fxtstor"). Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Acked-by: Keir Fraser --- diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c index bd162a8e1e..1230a527b7 100644 --- a/xen/arch/x86/i387.c +++ b/xen/arch/x86/i387.c @@ -96,8 +96,7 @@ static inline void fpu_fxrstor(struct vcpu *v) ".previous \n" _ASM_EXTABLE(1b, 2b) : - : "m" (*fpu_ctxt), "i" (sizeof(*fpu_ctxt) / 4), - "cdaSDb" (fpu_ctxt) ); + : "m" (*fpu_ctxt), "i" (sizeof(*fpu_ctxt) / 4), "R" (fpu_ctxt) ); break; case 4: case 2: asm volatile ( @@ -162,7 +161,7 @@ static inline void fpu_fxsave(struct vcpu *v) * addressing mode that doesn't require extended registers. */ asm volatile ( REX64_PREFIX "fxsave (%1)" - : "=m" (*fpu_ctxt) : "cdaSDb" (fpu_ctxt) ); + : "=m" (*fpu_ctxt) : "R" (fpu_ctxt) ); /* * AMD CPUs don't save/restore FDP/FIP/FOP unless an exception